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These projects were the ones chosen by students in previous summers of code.
These projects were the ones chosen by students in previous summers of code.
== 2019 ==
==== Block header parsing tool ====
Arpit Gupta worked on gr-modtool - a tool to help the development process of GNU Radio modules and blocks. He integrated header parsing to automatically extract information from block header that allow automatic binding generation for GRC and, in future, also Python. 
===== Objectives =====
* A tool to process a block definition into an abstract representation.
* Make gr_modtool use this tool instead of its builtin code to produces YAML files for GRC.
===== Student =====
* Student: Arpit Gupta
* Mentoring: Sebastian Koslowski, Nicolas Cuervo
Arpit's weekly blog can be found here: https://headerparser.wordpress.com/
==== Hardware in the Loop: Cycle-accurate Verilog Design Simulation Integration ====
Bowen integrated Verilator, a cycle-accurate simulator for Verilog modules, into GNU Radio. This allows rapid prototyping of small, well-defined Verilog modules directly in GNU Radio blocks.
===== Objectives =====
* Adapter code to call Verilator-generated Code of modules with fixed interface from within a GNU Radio block's work routine
* Integration of verilator into either build infrastructure or runtime infrastructure (might require further dependencies, e.g. llvm)
===== Student =====
* Student: Bowen Hu
* Mentoring: Marcus Müller
Bowens's weekly blog can be found here: https://b0wen-hu.github.io/
== 2017 ==
== 2017 ==

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