PLL Carrier Tracking: Difference between revisions

Revision as of 13:25, 28 October 2019

Implements a Phase Locked Loop (PLL) which locks to the carrier of the input frequency and outputs the input signal mixed with that carrier.

This PLL locks onto a [possibly noisy] reference carrier on the input and outputs that signal, downconverted to DC.

Important: The frequency parameters below are in radians per sample rather than Hz.
- for example:
  - input centered at 0 Hz.
  - Sample rate = 48kHz.
  - frequency variations to track +- 500Hz.
  - Max freq = 0.0654
  - Min freq = -0.0654

This block requires an input signal of at least -30db in order to lock to the carrier.

Loop bandwidth (R): The loop bandwidth determines the lock range and should be set around pi/200 2pi/100.

This flowgraph shows the use of a PLL Carrier Tracking block in an AM receiver.

@@ Line 1: / Line 1: @@
 [[Category:Block Docs]]
-Implements a PLL which locks to the input frequency and outputs the input signal mixed with that carrier.
+Implements a Phase Locked Loop (PLL) which locks to the carrier of the input frequency and outputs the input signal mixed with that carrier.
-This PLL locks onto a [possibly noisy] reference carrier on the input and outputs that signal, downconverted to DC
+This PLL locks onto a [possibly noisy] reference carrier on the input and outputs that signal, downconverted to DC.
+=== Notes ===
+* <b>Important:</b> The frequency parameters below are in <i>radians per sample</i> rather than Hz.
+** for example:
+*** input centered at 0 Hz.
+*** Sample rate = 48kHz.
+*** frequency variations to track +- 500Hz.
+*** Max freq = 0.0654
+*** Min freq = -0.0654
+* This block requires an input signal of at least -30db in order to lock to the carrier.
 == Parameters ==